Abstract: Multilevel inverter is used in applications that need high voltage and high current. The topologies of multilevel inverter have several advantages such as lower THD, lower EMI generation, better output waveform and higher efficiency for a given quality of output waveform. This paper presents the development of Altera FPGA as a control circuit for multilevel PWM single phase inverter. The FPGA chip produce 16 control signal for 9 level output voltage. Cyclone FPGA chip is a programmable logic device develop by Altera and can be considered as an efficient hardware for rapid prototyping. FPGA chip is chosen for the hardware implementation of control circuit is due to its high computation speed that can produce accurate control signal. Internal architecture of control circuit embeds in FPGA are described in detail. VHDL language is used to model the switching strategies and Quartus II software is used as a simulation and compiler tool. These inverter topologies with filters would have reduced harmonics and can operate at high efficiency.
Keywords: Field Programmable gate array (FPGA), VHDL Hardware description language, multilevel inverter, Cascaded multilevel inverter, Digital controller.
Title: Mat Lab Simulation of Nine Level Cascaded H-Bridge Inverter with Equal DC Voltage
Author: Suhashini D., Ambika A.
International Journal of Electrical and Electronics Research
ISSN 2348-6988, (online)
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