Abstract: Programmable Built-In Self-Test (PBIST) is a programmable testing technique where testing is accomplished without the aid of external hardware. The Repair Analyzer enables the fault bits to do the error correction using Redundancy strategy. To increase the reliability and yield of embedded memories, many redundancy mechanisms have been proposed. All the redundancy mechanisms bring penalty of area and complexity to embedded memories design. Considered that SRAM is used to configure for different needs, the BISR had better bring no change to other modules in SRAM. To solve the problem, a new redundancy scheme is proposed in this project. Some normal words in embedded memories can be selected as redundancy instead of adding spare words, spare rows, spare columns or spare blocks. Built-In Self-Repair (BISR) with Redundancy is an effective yield-enhancement strategy for embedded memories. This project proposes an efficient BISR strategy which consists of a Programmable Built-In Self-Test (PBIST) module, a Built-In Address-Analysis (BIAA) module, Multiplexer (MUX) module and a SRAM module. The BISR is designed flexible that it can provide four operation modes to SRAM users. Each fault address can be saved only once is the feature of the proposed BISR strategy. In BIAA module, fault addresses and redundant ones form a one-to- one mapping to achieve a high repair speed. Besides, instead of adding spare words, rows, columns or blocks in the SRAMs, users can select normal words as redundancy, since it supports word-oriented memories.
Keywords: Programmable Built-In Self-Test (PBIST), Built-In Address-Analysis (BIAA), Multiplexer (MUX), SRAM, full repair analyzer.
Title: Programmable Built In Self Test and Repair Analyzer Using Redundancy for Word Oriented SRAM
Author: Soni Mishra, Sandeep Sunkari
International Journal of Electrical and Electronics Research
ISSN 2348-6988 (online)
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