Abstract: The focus of this paper is effectuation of Inter IC (IIC) protocol interface for serial communicating purpose using V H DL and field programmable gate array of Spartan 3E board of cyclone II FPGA. To enable devices to communicate with each other over a serial data bus without data loss. Many serial communication protocols are proposed like SPI, CAN, UART. IIC protocol is advantageous in terms of simplicity of operation, less pin counts etc. Complete operation of Inter IC protocol includes read and write mode of operation. Read and write operation depends on which mode is selected and corresponding signals are generated. The complete module is designed in using active HDL tool of FSM approach and implemented on FPGA using Xiling software.
Keywords: IIC, SCL, SDA, VHDL, FPGA.
Title: VLSI Architecture for Serial Communication Inter–IC Protocol
Author: Prachi Ikhar, Prof. S. N. Rawat
International Journal of Electrical and Electronics Research
ISSN 2348-6988 (online)
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